In the world of electronics, and IC design in particular, the clock tree is the distribution network of wires along which the clock signal is supplied to all parts of the circuit.

The origin of the clock signal could be directly from an external crystal oscillator, but this is likely to be used by an on-chip PLLand clock generator to create the clock signals required by the different clock domains within the IC. Either way, the clock signal is a point source and must be distributed to all the circuit's sequential logic gates.

Clock trees are so-named because the distribution network can be visualised as tree branches emanating from the tree trunk, (symbolising the clock source, of course).

Why do we need a clock tree?
A clock distribution network is required to minimise clock skew within the circuit, thereby facilitating the correct timing operation of the circuit.
How a clock tree is implemented.
A clock tree can be balanced through the use of a hierarchy of buffers which helps to reduce the capacitive load seen by any driver in the clock network. Buffers also introduce delay into the clock tree, the amount of which can be determined on a 'branch by branch' basis. This hierarchical organisation of buffers is analagous to the way tree branches divide as they grow further out from the tree trunk.

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