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ILP (Instruction Level Parallelism) is the degree to which instructions can be executed in parallel. You can increase ILP by creating an ISA, which is the assembly programming language a processor runs on, such that it has inherent parallelism. For example, having instructions within the assembly language ISA that allow for specifying if certain sections of code are independent, what data dependencies exist, which direction a branch instruction will usually go. There is also the relatively new ideas of speculation, predication, and memory hints.

One real world example, of many, is Intel's new IA-64 ISA that the Itanium brand of chips run. Itanium is based off of EPIC (Explicitly Parallel Instruction Computing) and it allows for a higher degree of parallelism. The parallelism is specified by the compiler or coder so that the Itanium chip can achieve an unprecedented number of instructions per clock cycle. IA-64 is structured around bundles of code. There are certain instructions that can run together at the same time, and the compiler can tell the processor which instructions to combine. For example, the compiler could possibly see an independent load, store, and add instruction and tell the processor to do all three at the same time, in one bundle.

Besides bundles, IA-64 also allows for code hints, speculation, and predication. Speculation and predication involve running two different sections of code at the same time. Typically the fall through path and the branch path are simultaneously executed. The results of the path that is not taken are desregarded. Speculation involves running code with a speculated memory value, and then disregarding the results of an incorrect assumption. This allows the processor to correctly guess the direction of branches at a much higher frequency than would otherwise be possible and to have memory ready in a single clock cycle.

Overall, using an ISA with ILP allows for processor optimizations that do not, usually, improve the worst case runtime of un-optimized assembly code, but can achieve a huge performance benefit with a smart compiler or programmer at the cost of increased complexity and a new ISA.

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