Magnetic core memory, also known as core memory, is a non-volatile RAM implementation that catalyzed the development of the information age.
Principle:
Magnetic core memory is formed by an array of ferrite toroids with wires passing through it. Generally, there are three wires that pass through each core, X, Y, and Sense/Inhibit. In earlier systems, Sense and Inhibit often resided on different wires; however, as cores became smaller, three wire core memory became a necessity.
Each toroid holds a certain magnetic state. In order to change that state, a magnetic field over a certain threshold is required. The current threshold is determined by the hysteresis of the magnetic material used to construct the cores.
Memory locations are selected by sending half of required current through both the X and Y wires. Only the grid location desired has the full current required to change the memory location.
There are two distinct cycles: a read and a write cycle. Both cycles are required for every memory operation.
A read cycle changes all bits read to 0. However, for every bit flipped from 1 to 0, a pulse will be registered on the Sense wire.
A write cycle can either replaces the data destroyed in the write cycle or put new data in its place. To write a 0, the Inhibit line is supplied with sufficient current to counter the effect of the X and Y wires. Consequently, the location stays in the 0 state. To write a 1, the Inhibit line is not used and the current from the location selection will flip the bit to 1.
History:
The concept was first conceived by An Wang, a Shanghai-born physicist, in 1948 at Harvard Computation Laboratory. Wang soon sold his patent (U.S. Patent #2,708,722 - "Pulse Transfer Controlling Device", 1955) to IBM for $400,000. Further development of the idea came from MIT's Jay Forrester, head of the Whirlwind project. After, Forrester added his own finishing touches, it became the industry standard for fast RAM. MIT licensed Forrester's modifications to IBM who implemented it in its mainframe systems.
Applications:
Core memory was the RAM system of its time, implemented in all IBM's computers until the arrival of semiconductor in the 1970s. Semiconductor memory in its infancy was not as reliable as magnetic core technology; consequently, core memory dominated mission-critical applications for many years after the introduction of semiconductor RAM.
Cost:
In the 1950's a plane of 8192 bits (1 kB) cost approximately $6,000, or about $6 million per megabyte.
Speed:
Early core memory systems had a cycle time of around 6 µs (700 KHz). Eventually, the cycle time dropped to around 600 ns (1.7 MHz). On expensive projects, interleaving was often used to speed up the cycle time. Interleaving works much like RAID 0 in that consecutive bits are stored on different planes. Some IBM mainframes yielded an effective cycle time of approximately 20 ns (50 MHz) by using 32 interleaved planes.
Problems:
Like all magnetic devices, core memory is very susceptible to electromagnetic noise. Not surprisingly, the main mode of failure is interference, both external and internal. External interference is the easier of the two to treat; proper shielding of the storage device usually alleviated outside interference. By nature of the design, patterns of memory access can cause misreads. Reliability relied on a magical combination of memory timing, sense levels, and drive currents. Some later systems had a program that tried to flush out the problem with a brute force Worst Case Noise test.
At high access speeds, heat was also a problem. As wires heat up, their resistances change and consequently, the drive currents would fluctuate. Fluctuations in the drive current often then led to internal interference. Core Heating tests and thermistors were used to deal with the problem.
Construction:
All core memory were strung by hand using stereo microscopes. Thin needles were used to string the enamel-coated wires through the magnetic cores.