Technology/software developed by Transmeta for the Crusoe CPU.
The software is loaded into the computers RAM at boot and then translates the Intel x86-instructions to instuctions that the Crusoe's VLIW-engine understands.

A technology used to run programs on a processor architecture different from the one it was compiled/linked for. Roughly speaking, it introduces an abstraction layer between hardware and software that handles the CISC to RISC translation that most - if not all - modern CISC processors do anyway.

Perhaps the most prominent example today would be Transmetas Crusoe processor. It uses an optimizing translator to convert ia32 programs to its own VLIW/RISC instruction set. By using ideas like speculative translation, intelligent in-time optimizations, caching of code already translated etc., the Crusoe is theoretically able to run certain code faster than a much more complex native ia32 processor while converting rather less electricity to heat.

Many of the ideas used for the Crusoe can be found in an IBM research project called DAISY that was run to determine feasibility and efficiency of code morphing architectures. If you're interested, you can find information about the project at http://www.research.ibm.com/daisy/.

A fascinating thing about code morphing is that it theoretically allows to emulate many different architectures on a single processor just by changing the firmware (the translator). If you were really crazy and a genius, you might even be able to run several architectures simultaneously, but then you'd have to find a way to emulate each ones' register sets, interrupt handling schemes, virtual memory, ... at the same time which would probably give you some mental disorder.

Handling all those aspects is one of the major problems in code morphing since the translator has to provide all hardware features that the software might expect. This is not easy when considering all the features that modern processors offer. There are of course other pitfalls like code expansion (code changes its size when translated), finding a sensibe point to separate hardware and software (you could do x86 compatible virtual memory management in hardware, making it more complex but maybe faster) or self-modifying code.

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