Double Data Rate ("DDR") componentry doubles the bandwidth of the device by transfering data twice per cycle--on both the rising and falling edges of the clock signal. The clock signal transitions from "0" to "1" and back to "0" each cycle; the first is called the "rising edge" and the second the "falling edge". Normally only one of these is used to trigger a data transfer; with DDR components both are used.
Where is it Used?
DDR is one "trick" that the AGP standard uses to double performance over the older PCI bus technology.
DDR is of course also used with SDRAM to make DDR SDRAM.
What Does it Look Like?
A diagram:
Clock Used With Conventional and DDR Write Cycles
-1-> |---| |---| |---| |---|
Clock: | | | | | | | |
-0-> ...| |___| |___| |___| |...
| | | |
V V V V
___ ___ ___ ___
Conventional: / \ / \ / \ / \
...| A |___| B |___| C |___| D |...
(clock | | | | | | | |
timing) V V V V V V V V
_ _ _ _ _ _ _ _
DDR: / \ / \ / \ / \ / \ / \ / \ / \
...|A|_|B|_|C|_|D|_|E|_|F|_|G|_|H|...