The FDE cycle, or Fetch Decode Execute cycle for long, describes the process by which instructions are carried out in a CPU, the cycle is as seen below:
Fetch:
-The program counter is loaded as 0.
-This value is then copied to the memory address register (MAR)
-The data from the MAR is sent across the address bus in order to fetch the data from the stored address
-This data is then sent down the data bus to the memory data register (MDR) and the program counter is incremented by 1.
Decode:
-This data is then sent from the MDR to the current instruction register (CIR) to be split into opcode and operand
-Next the data is decoded by the control unit, decoding binary codes into the specific instruction they represent (eg, add or subtract).
Execute:
-What happens at this stage really depends on the specific instruction being executed.
-For example an arithmetic operation will be carried out in the ALU (arithmetic logic unit) with the results at each stage stored in the accumulator (ACC)
-alternatively if a value is being inputted it will be stored immediately in the accumulator
-or if a value is to be stored it will be moved from the accumulator, into the MDR and from there across the data bus and into RAM.