It's my understanding that most architectures use offsets in
branch instructions, as opposed to jumps. In the Motorola
HC11 ISA the
BRA and B?? (
conditional branch) instructions add an 8-bit signed offset to the program counter as opposed to
JMP, which puts a 16-bit word into PC. This is effectively what you're talking about, I think.
As a side note, PC is always a register. You're just required to use special instructions to write it. Also, even if you could do what you describe (result of an ALU op -> PC) you shouldn't have to worry about interrupts. Show me someone who designed a CPU with non-atomic instructions and I'll gladly kick their teeth in!
Magenta: This was a reply to
Sageran. It's not the first time that my slow
nodeforging skills have confused others!