Sorry, this doesn't work as expected.
I think with above circuit the sequence of would go like this from cycle
to cycle, assuming ENT is on all the time:
(Q3,Q2,Q1,Q0)
( 0, 0, 0, 0)
( 0, 0, 0, 1) (ENT toggles the least significant bit on)
( 0, 0, 1, 0) (Active Q0 toggles the next bit Q1 on, and ENT toggles Q0 off)
( 0, 1, 1, 1) (Active Q1 togles Q2 on, Q1 stays as it is (because Q0=0), and ENT toggles Q0 on)
( 1, 0, 0, 0) (Q2 toggles Q3 on, Q1 toggles Q2 off, Q0 toggles Q1 off, and ENT toggles Q0 off)
( 1, 0, 0, 1) (ENT toggles Q0 on)
( 1, 0, 1, 0) (Q0 toggles Q1 on, ENT toggles Q0 off)
( 1, 1, 1, 1) (Q1 toggles Q2 on, ENT toggles Q0 on)
( 0, 0, 0, 0) (Q2 toggles Q3 off, Q1 toggles Q2 off, Q0 toggles Q1 off, and ENT toggles Q0 off)
So with these four flipflops we get just a cycle of eight, instead of maximum 16.
If you instead want a normal binary sequence
(0000,0001,0010,0011,0100,0101,0110,0111,1000,1001,1010,1011,1100,1101,1110,1111)
you should connect logical 1 to both J & K-inputs of each flip flop,
the master CLK to the first (the least significant) JK-flipflop's CLK-input,
and the inverted Q-output of each flipflop to the CLK-input
of the next flipflop.
That way each JK-flipflop is "primed permanently for toggling",
but the flip-flops 1-3 will toggle only when the preceding
flip-flop changes its state from 1 to 0. (Which will show as
a rising clock edge at the next flip-flop's CLK-input).
(To increment a binary number by one: complement all bits from
the least significant end UP TO and INCLUDING the first zero
encountered. But no further!)
See also http://www.play-hookey.com/digital/ripple_counter.html