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A simple, series R-C circuit is yet another one of those basic, ideal examples incorporated into almost every calculus-based introductory physics course known to man.

The idea is that one can use the potential difference across a battery (or any other DC power source for that matter) to charge a capacitor by allowing current to flow through a single-loop circuit of resistance R. (The resistance can come either in the form of the intrinsic resistance of the wire comprising the circuit, or of some component resistor added as a part of the system.) The potential difference across the battery (Vtot) will be split between the resistor and the capacitor, so that the voltage over the resistor (VR) will equal

VR = I * R

where I is the current, and the voltage across the capacitor (VC) will equal

VC = Q / C

where Q is the charge stored on the capacitor, and C is the capacitor's capacitance. (Vtot = VR + VC).

The circuit will behave according to two distinct modes of operation: first, there is the case where one charges the capacitor from 0 to some maximum charge (Qmax = Vtot * C). In this scenario, the standard convention is that at time t=0, a switch is thrown and the circuit is completed. Because Q=0 at t=0, there is no potential difference across the capacitor (VC = 0), and the entirety of the voltage of the battery is spent over the resistor (VR = Vtot). As such, the initial current I0 can be found

I0 = Vtot / R

Charge will slowly accumulate on the plates of the capacitor, increasing VC and decreasing VR. As more and more of the potential difference is spent over the plates of the capacitor, the current in the circuit will decrease until the capacitor reaches its maximum charge, at which point the current ceases completely.

One can obtain a quantitative description of both the current in the circuit and the charge being stored on the plates of the capacitor at any point as a function of time by applying Kirchoff's Law and recalling that current is equivalent to the rate of charge transferred over a given amount of time (I = dQ/dt)

Vtot = IR + Q/C = R * dQ/dt + Q/C

Solving the differential equation, one finds that the charge

Q(t) = Qmax (1- e-t/T)

Where T is the capacitor time constant

T = RC

The current flowing through the circuit is

I(t) = I0 e-t/T

The other mode of operation for the circuit is that in which the charged capacitor is decoupled from the battery and allowed to discharge over the resistor. In this case, the capacitor will behave just like a battery, and its voltage VC will take on the role of the battery in the circuit (VR = VC). The charge on the capacitor will bleed off into the circuit

Q(t) = Q0 e-t/T

where Q0 is the initial charge. The current will begin at a maximum value I0 = VC /R, and fall off according to the relationship

I(t) = I0 e-t/T

until all of the charge is gone, and the current falls to zero.

... All in all, this is basically one of those horrible nightmares that keeps introductory physics students up with the cold sweats nights before the exam, but that looks really really really really easy when you try it again four years later.

(Really, honestly, I promise.)

The R-C circuit is a critically important model for both the switching delay and power consumption in a digital integrated circuit. In a digital integrated circuit, the channels of some MOSFET's drive the gates of other MOSFET's. More exactly, the first MOSFET's are resistive paths through which current must flow to charge or discharge the gates of the second MOSFET's, switching their binary logic states. Consider the diagram below. This circuit is a CMOS implementation of C = "A inverse" NAND B given two input signals A and B, but not A inverse. The inverter of A is on the left and the NAND gate is on the right.

```        Vdd              Vdd        Vdd
^               ^         ^
|               |         |
|               |         |
--              --        --
||              ||        ||
A--o||         ----o||    B--o||
||        |     ||        ||
--      |       --        --
|-----          |         |
|     |         |------------C
--      |       --
||        |     ||
A---||         -----||
||              ||
--              --
|               |
|               |
GND            --
||
B---||
||
--
|
|
GND

```

Before the NAND gate yields the correct output, it must have both A inverse and B on its input gates. If both A and B arrive at the same time to the circuit above, then B will arrive to the NAND gate before A inverse because the inversion of A causes a delay.

The easiest way to approximate the delay of the inversion of A is to treat the situation as an R-C circuit. The resistor is either the inverter's PMOSFET or NMOSFET--whichever one is on. As a specific example, let's assume that the output of the inverter is initially Vdd, but then the input of the inverter switches from 0 to Vdd. This new input turns on the NMOSFET, which provides a conductive path from the output to GND.

Using semiconductor device physics, the effective resistance R of the MOSFET during this pulldown of the output can be easily calculated. Furthermore, the capacitance C of the two NAND inputs that the output of the inverter drives is known. The output can be modelled as an exponential decay with time, as derived in an earlier writeup. Typically the switching time for the inverter is defined the time it takes for the output to reach half its initial value. This switching time Τ corresponds to 0.69RC.

In a digital circuit, it's obviously advantageous to reduce switching delay as much as possible, since it ultimately determines the maximum possible clocking rate for the circuit. Therefore less resistive MOSFET's with smaller input capacitances are highly desirable. The best way to achieve this combination is to reduce the size of the MOSFET's. The size of MOSFET's has decreased by orders of magnitude over the past decades and microprocessors have gotten faster (see Moore's Law). It is important to note that other resistances and capacitances besides those mentioned must be taken into account. Examples of such "parasitic" resistances and capacitances are interconnect resistance and capacitance, drain-to-body capacitance, and series resistance.

The R-C circuit also offers a way to analyze power consumption in a digital circuit. Typically, the vast majority of power consumed in a microprocessor is due to the charging and discharging of MOSFET gate capacitors. So how much energy does it take to charge a capacitor? If you remember some physics, you might be inclined to say 1/2CVdd2. This number is the energy stored in the capacitor. However, charging the gate capacitor requires current through a MOSFET channel, which we modelled as a resistor. It can be shown (very straightforward calculus) that the energy lost due to heating of the resistor also equals 1/2CVdd2. Thus the energy required to switch the binary state of a node is CVdd2. To get this in terms of power, we can multiply by the number of times the node switches per second. This is written as the clock frequency f times an activity factor α that describes the probability of switching. We find that the power required to operate that node is αfCVdd2.

An RC circuit could operate in either charge mode or discharge mode. In charge mode, the capacitor is hooked up to a potential difference (battery). Electrons leave the negative terminal and onto one of the two plates, the other plate become positive. The charge slowly builds up in the capacitor. The potential difference across it increases. The current would continue to flow but slowly diminishing as the voltage across the capacitor reaches the emf of the battery. Eventually, there would be no potential difference across the resistor, and no current flow. At this point the capacitor is fully charged.
The resistance, R multiplied by the capacaitance C, yields a product called the time constant of the circuit. This number corresponds to the time it'd take for the capacitor to reach 0.63 of its full charge
The equation of a simple RC circuit is given by:
Vc= E(1 - e^(-t/RC)
Where Vc is the voltage across the capacitance. E is the emf of the battery or voltage source, and t is the time

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