Given that
IBM,
Motorola and
Intel have recently announced laboratory tests of extremely simple
niobium-based
superconducting chips that can run at 750
Gigahertz (!) this starts to look less ridiculous. Although many, many more instructions would be needed to run an
OISC, it's much more likely that you'd be able to get a chip that contained only one instruction to be able to run at these speeds due to its simplicity. Since that's around 500 times as fast as the fastest
Pentium chip on the market right now, as long as it's less than 500 times as
inefficient it's still viable. Also, if you could
parallelize it at all, it would probably be much much easier to multiprocess using this simple logic than using
CISC or even
RISC (although I could be talking out of my a-- on that one).
Hmm. An interesting idea, no matter what.