The CMOS, (Complementary-MOS), logic family is so called because it uses both N-type and P-type MOS transistors to create logic functions.

The simplest example of a CMOS circuit is that of a logical inverter:

                               ---    VDD
                                |
                                |
                                |
                             |--
                      -------| PMOS
                      |      |--
                      |         |
                      |         |
           IN --------|         |--- OUT
                      |         |
                      |         |
                      |      |--
                      -------| NMOS
                             |--
                                |
                                |
                                |
                              -----
                               ---
                                -      VSS
Here, the input is connected to the gate of both the PMOS and NMOS transistor. VDD represents the positive voltage supply, VSS represents the zero volts line.

Here's how it works:Applying a 'logical 1' voltage level to the input causes the PMOS device to turn off and the NMOS device to turn on. Current flows through the NMOS transistor only, and the inverter's output is pulled down to VSS, (a 'logical 0' voltage level or zero volts). Thus, a 'logical 1' on the input causes a 'logical 0' to appear on the output - an inversion of the logical state of the input to the device. The same theory applies with a 'logical 0' on the input.

This simple logic gate illustrates one of the main benefits of using CMOS logic - when the PMOS device is 'on', the NMOS device is 'off', and vice versa. Thus, the only time there is a current path between VDD and VSS is during the brief period where the states of the transistors are switching.